Artec introduces scalable LPC bus device

Artec Group is continuing to refine of its low-level development tools supporting LPC bus and has released its next generation scalable development toolkit utilizing LPC bus.  Click here for more information.

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BioDSP Board

Features:

  • Xilinx Spartan3 FPGA (XC3S400, XC3S1000, XC3S1500)
  • Onboard Xilinx platform flash
  • SDRAM 16 bit interface 32MB
  • 100 MHz OSC (high precision)
  • 5V single current source
  • 6 extension headers
  • Available add on boards (Ethernet)
  • LVDS capable board stacking interface
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Programmable LPC Dongle

Compact size LPC dongle with USB programming/debug interface.

Dongle Version 5 Features:

  • Supports LPC memory read (can be disabled),LPC Firmware Hub memory read
  • Supports LPC IO write for POST Code capture and display
  • Post code peek mode (LPC memory / FWH reads from dongle are disabled)
  • Post code logger (sends all postcodes to USB serial port as hexadecimal bytes in ASCII)
  • 4 segment LED display for debug purposes
  • 10 bit GPIO header for debug purposes
  • Selectable voltage source either USB or LPC bus
  • 4 jumper selectable boot images for LPC
  • Third party free USB drivers for
  • Windows (98,2000,ME,XP)
  • Linux 2.4 and greater
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