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Artec introduces scalable LPC bus device

Artec Group is continuing to refine of its low-level development tools supporting LPC bus and has released its next generation scalable development toolkit utilizing LPC bus.  Click here for more information.

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VPNow
Artec has designed a set of software and hardware modules collectively called VPNow. This technology allows easily integrate the VPN solution into existing ICs and new products. Both of these modules are scalable and portable.

The VPNow technology provides the means to easily integrate IPsec based security into existing and new integrated circuits. The product fits into a system where:
 - System CPU is available for processing IPsec housekeeping tasks
 - External interfaces can connect to the hardware unit Both components support ipv4 and ipv6. It is possible to tunnel ipv6 packets via ipv4 networks and vice-versa. This allows conserving the networking infrastructure costs during transition period from ipv4 to ipv6.

The hardware unit does all of the IPsec low-level packet processing and system IO. The software unit controls the hardware unit and handles the SA and Policy databases.

Operating principle
To verify the IPs a two step approach is taken. First the blocks are programmed into Virtex-II FPGA to verify the functionality and then the Demonstration IC will be fabricated. This IC will allow any system with PCI interface to connect using IPSec standard. The processing will be hidden into the VPNow module inside the IC (called BITSie as Bump In The Stack internet enabler). BITSie will hide the functionality of VPN processing from OS stack allowing to switch to IPSec without replacing OS and adding new resources to existing system.
 
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